High Fault Coverage of In-Circuit IC Pin Faults with a Vectorless Test Technique Using Parasitic Transistors

Introduction The use of vectorless test techniques for detecting and isolating process related circuit board faults for IC devices has become widely accepted as the method of first choice because of their cost savings. However, for high fault coverage, most vectorless techniques must be supplemented with expensive functional test methods. A vectorless test technique has been developed that uses a simple transistor test to detect and isolate I/O related faults on all types of ICs, from simple devices to complex ASICs, that has the advantage of providing high fault coverage without using function test as a back-up.